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Feb 23 In-Class Exercise Thread.

Please post your solutions to the Feb 23 In-Class Exercise to this thread.

Best,

Chris

Please post your solutions to the Feb 23 In-Class Exercise to this thread. Best, Chris

-- Feb 23 In-Class Exercise Thread

0. LoadProcid 0           // register[M, v1, v2, v3]    accumulator[i	]
1. Load 1, 1              // register[M, v1, v2, v3]    accumulator[i,1	]
2. AddAcc 1, 0            // register[M, v1, v2, v3]    accumulator[i+1	, 1]
3. ReadAcc (0), 1         // register[M, v1, v2, v3]    accumulator[i+1, v1	]
4. Add 0, 0               // register[M, v1, v2, v3]    accumulator[i+1+M	, v1]
5. ReadAcc (0), 2         // register[M, v1, v2, v3]    accumulator[i+1+M, v1, v2	]
6. AddAcc 1, 2            // register[M, v1, v2, v3]    accumulator[i+1+M, v1, v1+v2	]
7. Add 0, 0               // register[M, v1, v2, v3]    accumulator[i+1+M+M	, v1, v1+v2]
8. StoreAcc (0), 2        // register[M, v1, v2, v1+v2	] accumulator[i+1+M+M, v1, v1+v2]
9. Halt

(Edited: 2022-02-27)

<pre> 0. LoadProcid 0 // register[M, v1, v2, v3] accumulator['''i'''] 1. Load 1, 1 // register[M, v1, v2, v3] accumulator[i,'''1'''] 2. AddAcc 1, 0 // register[M, v1, v2, v3] accumulator['''i+1''', 1] 3. ReadAcc (0), 1 // register[M, v1, v2, v3] accumulator[i+1, '''v1'''] 4. Add 0, 0 // register[M, v1, v2, v3] accumulator['''i+1+M''', v1] 5. ReadAcc (0), 2 // register[M, v1, v2, v3] accumulator[i+1+M, v1,''' v2'''] 6. AddAcc 1, 2 // register[M, v1, v2, v3] accumulator[i+1+M, v1, '''v1+v2'''] 7. Add 0, 0 // register[M, v1, v2, v3] accumulator['''i+1+M+M''', v1, v1+v2] 8. StoreAcc (0), 2 // register[M, v1, v2, '''v1+v2'''] accumulator[i+1+M+M, v1, v1+v2] 9. Halt </pre>

-- Feb 23 In-Class Exercise Thread

((resource:Screen Shot 2022-02-23 at 8.42.56 PM.jpg|Resource Description for Screen Shot 2022-02-23 at 8.42.56 PM.jpg))

-- Feb 23 In-Class Exercise Thread

M processors, 3M global registers, M stored in register 0

0. LoadProcid 0 // Load the current processor id (i) in accumulator 0

1. Load 1, 1 // Load integer 1 into accumulator 1

2. Store 1, 1 // Store value of accumulator 1 (1) into register 1

3. Add 1, 0 // Add the value of register 1 (1) to the accumulator 0's value (i)

4. ReadAcc (0), 1 // Look up value v in accumulator 0 (i + 1), then read register v (value at register i + 1) into accumulator 1

5. Store 1, 1 // Store value of accumulator 1 (value at register i + 1) into register 1

6. Add 0, 0 // Add the value of register 0 (M) to the accumulator 0's value (i + 1)

7. ReadAcc (0), 1 // Look up value v in accumulator 0 (i + M + 1), then read register v (value at register i + M + 1) into accumulator 1

8. Add 1, 1 // Add the value of register 1 (value at register i + 1) to the accumulator 1's value (value at i + M + 1)

9. Add 0, 0 // Add the value of register 0 (M) to the accumulator 0's value (i + M + 1)

10. StoreAcc (0), 1 // Look up value v in accumulator 0 (i + 2M + 1), then store in register v (at register i + 2M + 1) value of accumulator 1 (sum of values at i + 1 and at i + M + 1)

11. Halt

(Edited: 2022-02-23)

M processors, 3M global registers, M stored in register 0 0. LoadProcid 0 // Load the current processor id (i) in accumulator 0 1. Load 1, 1 // Load integer 1 into accumulator 1 2. Store 1, 1 // Store value of accumulator 1 (1) into register 1 3. Add 1, 0 // Add the value of register 1 (1) to the accumulator 0's value (i) 4. ReadAcc (0), 1 // Look up value v in accumulator 0 (i + 1), then read register v (value at register i + 1) into accumulator 1 5. Store 1, 1 // Store value of accumulator 1 (value at register i + 1) into register 1 6. Add 0, 0 // Add the value of register 0 (M) to the accumulator 0's value (i + 1) 7. ReadAcc (0), 1 // Look up value v in accumulator 0 (i + M + 1), then read register v (value at register i + M + 1) into accumulator 1 8. Add 1, 1 // Add the value of register 1 (value at register i + 1) to the accumulator 1's value (value at i + M + 1) 9. Add 0, 0 // Add the value of register 0 (M) to the accumulator 0's value (i + M + 1) 10. StoreAcc (0), 1 // Look up value v in accumulator 0 (i + 2M + 1), then store in register v (at register i + 2M + 1) value of accumulator 1 (sum of values at i + 1 and at i + M + 1) 11. Halt

-- Feb 23 In-Class Exercise Thread

LoadProcid 0 		// acc0=i
Load 1,1 		// acc1=1
Read 0,2		// acc2=M
Read 0,3		// acc3=M
Store 0,0		// reg0=i
Add 0,1			// acc1=i+1
Store 0,1		// reg0=i+i
Add 0,2			// acc2=i+1+M
Store 0,2		// reg0=i+1+M
Add 0,3			// acc3=i+1+2M
ReadAcc (1),1		// acc1=reg[i+1]
ReadAcc (2),2		// acc2=reg[i+1+M]
Store 0,1		// reg0=reg[i+1]
Add 0,2			// acc2 = reg[i+1] + reg[i+1+M]
StoreAcc(3),2		// reg[i+1+2M]=reg[i+1] + reg[i+1+M]
Halt

(Edited: 2022-02-24)

<pre> LoadProcid 0 // acc0=i Load 1,1 // acc1=1 Read 0,2 // acc2=M Read 0,3 // acc3=M Store 0,0 // reg0=i Add 0,1 // acc1=i+1 Store 0,1 // reg0=i+i Add 0,2 // acc2=i+1+M Store 0,2 // reg0=i+1+M Add 0,3 // acc3=i+1+2M ReadAcc (1),1 // acc1=reg[i+1] ReadAcc (2),2 // acc2=reg[i+1+M] Store 0,1 // reg0=reg[i+1] Add 0,2 // acc2 = reg[i+1] + reg[i+1+M] StoreAcc(3),2 // reg[i+1+2M]=reg[i+1] + reg[i+1+M] Halt </pre>

-- Feb 23 In-Class Exercise Thread

Load Procid 0 // acc[0]= i
Load 1,1 // acc[1] = 1
AddAcc 1,0 // acc[0] = i+1
ReadAcc 0,2 // acc[2] = i+1
Add 0,2 // acc[2] = i+M+1
Store 1,2 // reg[1] = i+M+1
Read 0,3 // acc[3] = M
Add 1,3 // acc[3] = i+2M+1
ReadAcc (0),0 // acc[0] = reg[ i+1]
ReadAcc (2),2 //acc[2] = reg[i+M+1]
AddAcc 0,2 //acc[2]= reg[i+1] + reg[i+M+1]
StoreAcc (3),2 // reg[ i+2M+1] = reg[i+1] + reg[i+M+1]
Halt

(Edited: 2022-02-24)

Load Procid 0 // acc[0]= i Load 1,1 // acc[1] = 1 AddAcc 1,0 // acc[0] = i+1 ReadAcc 0,2 // acc[2] = i+1 Add 0,2 // acc[2] = i+M+1 Store 1,2 // reg[1] = i+M+1 Read 0,3 // acc[3] = M Add 1,3 // acc[3] = i+2M+1 ReadAcc (0),0 // acc[0] = reg[ i+1] ReadAcc (2),2 //acc[2] = reg[i+M+1] AddAcc 0,2 //acc[2]= reg[i+1] + reg[i+M+1] StoreAcc (3),2 // reg[ i+2M+1] = reg[i+1] + reg[i+M+1] Halt

-- Feb 23 In-Class Exercise Thread

((resource:20220225_011615.jpg|Resource Description for 20220225_011615.jpg))

-- Feb 23 In-Class Exercise Thread

LoadProcid 0      # Load acc0 of each process with process id 0,1,....m
Read 0,1          # acc1 = m
Load 1,2          # acc2 = 1
Store 0,2         # Register 0 = 1
Add 0,0           # acc0 = 1,2........m+1
ReadACc (0),3     # acc3 =  value[1],.......value[m+1]
Store 0,1         # Register 0 = m
Add 0,0           # acc0 = 1+m,2+m,..........2m+1
ReadACc (0),4     # acc4 = value[1+m],.......value[2m+1]
Add 0,0           # acc0 = 1+2m,..............3m
AddAcc 3,4        # acc4 = add value of acc3 and acc4 for each processor
StoreAcc(0),4     # store value of acc4 in registers 1+2m,..............,3m
Halt              # end

<pre> LoadProcid 0 # Load acc0 of each process with process id 0,1,....m Read 0,1 # acc1 = m Load 1,2 # acc2 = 1 Store 0,2 # Register 0 = 1 Add 0,0 # acc0 = 1,2........m+1 ReadACc (0),3 # acc3 = value[1],.......value[m+1] Store 0,1 # Register 0 = m Add 0,0 # acc0 = 1+m,2+m,..........2m+1 ReadACc (0),4 # acc4 = value[1+m],.......value[2m+1] Add 0,0 # acc0 = 1+2m,..............3m AddAcc 3,4 # acc4 = add value of acc3 and acc4 for each processor StoreAcc(0),4 # store value of acc4 in registers 1+2m,..............,3m Halt # end </pre>

-- Feb 23 In-Class Exercise Thread

1. Load ProcId 0
2. Load 1,1
3. Store 1,1
4. Add 1,0
5. ReadAcc (0),1
6. Store 1,1
7. Add 0,0
8. ReadAcc (0),1
9. Add 0,0
10. Add 1,1
11. StoreAcc (0),1
12. Halt

<pre> 1. Load ProcId 0 2. Load 1,1 3. Store 1,1 4. Add 1,0 5. ReadAcc (0),1 6. Store 1,1 7. Add 0,0 8. ReadAcc (0),1 9. Add 0,0 10. Add 1,1 11. StoreAcc (0),1 12. Halt </pre>

-- Feb 23 In-Class Exercise Thread

Resource Description for Screenshot 2022-02-26 174210.jpg

((resource:Screenshot 2022-02-26 174210.jpg|Resource Description for Screenshot 2022-02-26 174210.jpg))